1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and particularly relates to a semiconductor integrated circuit having a plurality of different types of circuits, differing in function, integrated on the same chip, and a fabrication method for the same.
2. Description of the Related Art
Semiconductor integrated circuits (LSIs) are capable of including circuits with various functions integrated on a single chip. For example, a high-speed operating logic circuit and large capacity memory, such as a dynamic random access memory (DRAM) are integrated on the same chip.
The demand for miniaturized and speed-enhanced LSIs is increasing. The demands for an LSI with a half pitch of 65 nm or less are given in the INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS 2003 EDITION, for example. The thickness of diffusion regions, such as a source region, a drain region, a source extension region, and a drain extension region, is thin, approximately 13.8 nm so as to suppress a short-channel effect. Furthermore, sheet resistances of the diffusion regions, such as the source region, the drain region, the source extension region, and the drain extension region, should be 412 ohms or less in the case of an n-channel MOS transistor, and 884 ohms or less in the case of a p-channel MOS transistor have been in demand in order to prevent reduction of transistor characteristics due to parasitic resistance. The ‘source extension region’ and the ‘drain extension region’ are formed near gate electrodes of the source region and the drain region, respectively. Generally, the source extension region and the drain extension region have a higher impurity concentration and are thinner than the source region and the drain region, respectively. It is difficult to fabricate an LSI that satisfies the above requirements by, use of a diffusion furnace type heat treatment apparatus or a lamp annealing apparatus that uses a tungsten halogen lamp as a light source.
Therefore, there is a demand for a heat treatment apparatus that carries out high temperature heat treatment in a short period of time by using a lamp annealing apparatus. A response to that demand is a line scanning heat treatment apparatus using an infrared laser beam as a heat source. Heat treatment using a line scanning heat treatment apparatus is hereafter called ‘high temperature laser heat treatment’. The diffusion regions are made thinner through high temperature laser heat treatment.
The line scanning heat treatment apparatus fails to carry out heat treatment over the entire wafer at one time since it is difficult to increase the laser beam irradiating area. Accordingly, with the line scanning heat treatment apparatus, heat treatment is carried out by scanning a laser beam that irradiates a small area. However, high temperature laser heat treatment has the following demerits. Namely, with high temperature laser heat treatment, restoration of crystal defects formed by ion implantation is inadequate. In addition, crystal defects other than ion implantation defects may be generated by high temperature laser heat treatment. Furthermore, there are cases where insulation characteristics of gate insulating films deteriorate.
Higher switching speed transistors have been in demand for high-speed logic circuits. Accordingly, activation of impurities through high temperature laser heat treatment is necessary for logic circuits. On the other hand, with a DRAM or the like that retains data by accumulating charges, increasing density of the transistors and suppressing leakage current of the transistors, so as to retain memory data for a long period of time, are more important than increasing the transistor switching speed. Accordingly, application of high temperature laser heat treatment to DRAM fabrication is unnecessary. On the other hand, since crystal defects are generated due to application of high temperature laser heat treatment, required DRAM performance may deteriorate. Therefore, it is difficult to apply high temperature laser heat treatment to logic circuits integrated on the same chip in which a memory, such as DRAM, is fabricated.